On Wed, 21 Nov 2001, Sven Loechner wrote:
Minutes of the weekly Otis and Beetle meeeting, 22.11.2001

participants:
Daniel Baumeister
Sven Loechner
Uwe Stange
Dirk Wiedner


OTIS:

Status of OTIS                                  D.W., U.S.
Uwe Stange
-ongoing implementation of extended drifttime mode for OTIS output
 (some verilog specific pointer inconviniences)
Harald Deppe
-DNL at pulse length 3.6 ns and 150k events measured, memory off
-control voltage was generated externally
-> measurement of last dummy out instead of external control voltage
Dirk Wiedner
-OTR systemtest including OTIS are negotiated
-LHCb light desision for OTR will be made at the december
 LHCb week


BEETLE:

Pipelinehomogenity for Beetle 1.1               D.B.
data generated internally for whloe chip
 maximum deviation of 2-3 mV at -2,-1,1,2 MIPs for all channels
 (very homogenous)
data generated exterally for 12 channels
 output between 70 and 170 mV at 1.5 MIP input
 these deviations are measured between different
 channels as well as forthe same channel on
 different pipeline rows. For unknown reasons
 the variation inside one channel is correlated for
 different channels (high and low rows)

BeetleFE 1.1 and 1.2                            S.L.
Pulseshapes for all frondends are taken (1000 average)

BeetleFE 1.1
peaking time for nmos input
17ns at  0pF
26ns at 48pF
gain
24mV/17000 e- for 0pF
12mV/17000 e- for 48pF

BeetleFE 1.2
pmos input
oszillating problems

noise measurements D.B
RT1 chip 999.94 e- + 41.8/pF e- noise

next steps
-noise
-homogenity
-pulse shapes

Beetle User

Lousanne received:
-8 beetle 1.1
-3 test PCBs
wants 1 motherboard (production at MPI-K)
not ready


Greetings Dirk Wiedner